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Progettazione di un addizionatore a bassa potenza per VLSI

Progettazione di un addizionatore a bassa potenza per VLSI

Bhagwat Kakde / Manish Jain

75,87 €
IVA incluido
Disponible
Editorial:
KS OmniScriptum Publishing
Año de edición:
2025
Materia
Empresa y gestión
ISBN:
9786209149665
75,87 €
IVA incluido
Disponible

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Questo lavoro propone un sommatore approssimato efficiente dal punto di vista energetico che fornisce un’addizione a basso consumo e ad alte prestazioni senza gravi degradi qualitativi. L’addizionatore proposto introduce una logica approssimata efficiente dal punto di vista dell’area che viene utilizzata per aggiungere i bit meno significativi dell’addizionatore. L’efficacia dell’addizionatore viene analizzata rispetto ai ben noti addizionatori accurati e approssimati, implementandoli su Tanner e MATLAB. I risultati della simulazione dimostrano che l’adder proposto ha prestazioni superiori a quelle dell’adder esistente e può essere applicato efficacemente alle applicazioni che possono tollerare una piccola quantità di errori.

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