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LOW POWER ADDER DESIGN for VLSI

LOW POWER ADDER DESIGN for VLSI

Bhagwat Kakde / Manish Jain

75,81 €
IVA incluido
Disponible
Editorial:
KS OmniScriptum Publishing
Año de edición:
2025
Materia
Empresa y gestión
ISBN:
9786208847791
75,81 €
IVA incluido
Disponible

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Sobre IBD

This wok proposes an energy efficient approximate adder that provides low power high performance addition without severe quality degradation. The proposed adder introduces area efficient approximate logic that is used to adder least significant bits of the adder. The effectiveness of the adder is analyzed over the well known accurate and approximate adders by implementing on Tanner and MATLAB. The simulation result shows that proposed adder outperform over the existing adder and can be effectively applied to the applications that can tolerate small amount of error.

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