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Routing Congestion in VLSI Circuits

Routing Congestion in VLSI Circuits

Prashant Saxena / Rupesh S. Shelar / Sachin Sapatnekar

195,53 €
IVA incluido
Disponible
Editorial:
Springer Nature B.V.
Año de edición:
2010
Materia
Diseño asistido por ordenador (CAD)
ISBN:
9781441940131
195,53 €
IVA incluido
Disponible

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Sobre IBD

The Origins of Congestion.- An Introduction to Routing Congestion.- The Estimation of Congestion.- Placement-level Metrics for Routing Congestion.- Synthesis-level Metrics for Routing Congestion.- The Optimization of Congestion.- Congestion Optimization During Interconnect Synthesis and Routing.- Congestion Optimization During Placement.- Congestion Optimization During Technology Mapping and Logic Synthesis.- Congestion Implications of High Level Design.

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Otros libros del autor

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    This volume provides a complete understanding of the fundamental causes of routing congestion in present-day and next-generation VLSI circuits, offers techniques for estimating and relieving congestion, and provides a critical analysis of the accuracy and effectiveness of these techniques. The book includes metrics and optimization techniques for rout...
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