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Routing Congestion in VLSI Circuits

Routing Congestion in VLSI Circuits

Prashant Saxena / Rupesh S. Shelar / Sachin Sapatnekar

206,47 €
IVA incluido
Disponible
Editorial:
Springer Nature B.V.
Año de edición:
2007
Materia
Diseño asistido por ordenador (CAD)
ISBN:
9780387300375
206,47 €
IVA incluido
Disponible

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Sobre IBD

This volume provides a complete understanding of the fundamental causes of routing congestion in present-day and next-generation VLSI circuits, offers techniques for estimating and relieving congestion, and provides a critical analysis of the accuracy and effectiveness of these techniques. The book includes metrics and optimization techniques for routing congestion at various stages of the VLSI design flow. The subjects covered include an explanation of why the problem of congestion is important and how it will trend, plus definitions of metrics that are appropriate for measuring congestion, and descriptions of techniques for estimating and optimizing routing congestion issues in cell-/library-based VLSI circuits.

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Otros libros del autor

  • Routing Congestion in VLSI Circuits
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    The Origins of Congestion.- An Introduction to Routing Congestion.- The Estimation of Congestion.- Placement-level Metrics for Routing Congestion.- Synthesis-level Metrics for Routing Congestion.- The Optimization of Congestion.- Congestion Optimization During Interconnect Synthesis and Routing.- Congestion Optimization During Placement.- Congestion Optimization During Technolo...
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