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Head-Order Techniques and Other Pragmatics of Lambda Calculus Graph Reduction

Head-Order Techniques and Other Pragmatics of Lambda Calculus Graph Reduction

Head-Order Techniques and Other Pragmatics of Lambda Calculus Graph Reduction

Nikos B. Troullinos / Nikos BTroullinos

36,73 €
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Editorial:
Universal-Publishers.com
Año de edición:
2011
Materia
Ciencias de la computación
ISBN:
9781612337579
36,73 €
IVA incluido
Disponible

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Available in Paperback Available in eBook editions (PDF format)Institution:Syracuse University (Syracuse, NY, USA)Advisor(s):Prof. Klaus J. BerklingDegree:Ph.D. in Computer and Information ScienceYear:1993Book Information:248 pagesPublisher:Dissertation.comISBN-10:1612337570ISBN-13:9781612337579View First 25 pages:(free download)AbstractThe operational aspects of Lambda Calculus are studied as a fundamental basis for high-order functional computation. We consider systems having full reduction semantics, i.e., equivalence-preserving transformations of functions. The historic lineage from Eval-Apply to SECD to RTNF/RTLF culminates in the techniques of normal-order graph Head Order Reduction (HOR). By using a scalar mechanism to artificially bind relatively free variables, HOR makes it relatively effortless to reduce expressions beyond weak normal form and to allow expression-level results while exhibiting a well-behaved linear self-modifying code structure. Several variations of HOR are presented and compared to other efficient reducers, with and without sharing, including a conservative breadth-first one which mechanically takes advantage of the inherent, fine-grained parallelism of the head normal form. We include abstract machine and concrete implementations of all the reducers in pure functional code. Benchmarking comparisons are made through a combined time-space efficiency metric. The original results indicate that circa 2010 reduction rates of 10-100 million reductions per second can be achieved in software interpreters and a billion reductions per second can be achieved by a state-of-the art custom VLSI implementation.

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